Megawatt-Scale Partial PHIL Arm-Current Emulation for Submodule-Level Verification of MMC-Based Drives
Journal, IEEE Journal of Emerging and Selected Topics in Power Electronics
S. -Y. Lee, J. Park, D. Kim, S. -K. Sul, S. Cui and J. -J. Jung, “Megawatt-Scale Partial PHIL Arm-Current Emulation for Submodule-Level Verification of MMC-Based Drives,” in IEEE Journal of Emerging and Selected Topics in Power Electronics, doi: 10.1109/JESTPE.2026.3719385.
Author
Seung-Yong Lee, Jaeyeon Park, Dongjoon Kim, Seung-Ki Sul, Shenghui Cui, Jae-Jung Jung
Abstract
The modular multilevel converter (MMC) is widely employed in high-power applications, and the reliability of its submodules (SMs) is critical to overall system performance. To ensure reliability, SMs must be validated under operating conditions identical to those of a full MMC; however, full-system testing is both costly and time-consuming. This paper presents a hardware-based partial in-situ testing framework for MMC SMs, in which an arm-current emulator (ACE) power-amplifier interface applies representative arm-current excitation to the SM under test. The ACE reproduces full-scale MMC arm currents, including the high-frequency circulating components that arise during low-speed operation of variable-frequency drives (VFDs). To achieve robust current reproduction under low-speed VFD conditions, the proposed ACE maintains sufficient voltage margin for high-frequency circulating-current injection and incorporates a practical disturbance-mitigation term that suppresses disturbance-induced current spikes from the system under test (SUT) without requiring additional sensing hardware. The proposed design is experimentally validated on a 5-MW-class PHILS-based MMC-VFD platform, demonstrating that the arm-current reproduction accuracy meets the specified design error bounds across key operating modes. These results establish a practical and scalable solution for efficient submodule-level verification in large-scale MMC-VFD systems.